Towards LDPC Read Performance of 3D Flash Memories with Layer-induced Error Characteristics

3D flash memories have been widely developed to further increase the storage capacity of SSDs by vertically stacking multiple layers. However, this special physical structure brings new error characteristics. Existing studies discovered that there exist significant Raw Bit Error Rates (RBERs) variations among different layers and RBERs similarity inside same layer due manufacturing process. These characteristics would introduce a data reliability issue. Currently, Low-Density Parity-Check (LDPC) code has used ensure memories. It can provide stronger correction capability for high trading with longer read latency. Traditional LDPC codes designed planar do not consider RBER memories, which may induce sub-optimal performance. This paper first investigates effect on performance, then obtains two observations. On one hand, we observe latencies are largely diverse in speeds along retention. phenomenon is caused inter-layer variation. other also compare between pages quite similar, intra-layer similarity. Then, exploiting these observation results, proposes Multi-Granularity (MG-LDPC) method adapt latency across In detail, design five decoding engines varied level granularity (higher induces higher latency) assign each dynamically according prior information, or fixed way. A series experimental results demonstrate dynamic MG-LDPC methods reduce SSD response time \(21\% \) \(51\% average, respectively.